In this research thread, we consider a very powerful adversary model that involves attacks that enable an attacker to bypass the tamper resistance of individual nodes in cyber-physical systems. The attacker can read the contents of different memories, and as a result, any protection based on the tamper resistance of the chip (e.g., stored cryptographic keys) will be rendered useless. We are proposing a model of different hardware intrinsic functions that will allow the binding of software to a specific hardware both for IP protection but also for protection against counterfeiting/reused/repackaged products. The proposal is currently implemented in FPGA platforms.